Abteilungsleitung Tanja Dettinger Tel: +49-6159-71-2207 Ort: C26 1.011 Stellvertretung Mathias Henke Tel.: 2511, 2512, 3027 Ort: SB2.1.219, SB2.1.228

der Qualitätssicherung. Department Head Telefon: +49-6159-71-3858 E-Mail: Dr. Udo Weinrich Raum: SB1.4.103d

Parameter Wert Zeitpräzision < 20 ps Doppelpulsauflösung 3,2 ns Max. Rate 13 MHz / Chip Min. Pulslänge < 1 ns Eingangspegel LVDS Der GET4 ASIC wird aktuelle bereits erfolgreich am FAIR-Phase 0 Experiement am

searches at MHz to GHz frequencies N. Aggarwal et al. Living Reviews in Relativity, Volume 24, Issue 1, article id.4 2021 A Global Numerical Model of the Prompt Emission in Short Gamma-ray Bursts H. Ito

boards as platform for receiving data via SFP with the GOSIP protocol: PEXOR3 (Lattice FPGA), KINPEX1 (Xilinx Kintex) . TRIXOR TRIXOR is the MBS trigger module that is closely attached to PEXOR or KINPEX

FEBEX data acquisition For the supporting of the experiments at GSI a completely new data acquisition system is developed in Experiment-Electronics Department of GSI. The main hardware component of th

based platforms for time measurements with MBS . These platforms include the boards FEBEX3a , TAMEX1 and TAMEX2. Documents Publications: An FPGA implementation of a 128-channel sub-nanosecond time-to-digital

Documents: User Manual: The Exploder and Trigger Module. Trigger Module (EXPLODER3A and EXPLODER2A_DB1) connector reference

VULOM VULOM ( VME Universal Logic Module) is a 1-unit-wide VME 6U module with 16 ECL-inputs, 16 ECL-outputs, 16 ECL- I/Os, 2 NIM-inputs and 2 NIM-outputs on its front-panel and a FPGA ( Virtex 4 by Xilinx

Sn 5+ 167.45 56 Fe 3+ 182.98 197 Au 8+ 606.75 Unilac VARIS 16 O 1+ 165.183 107 Ag 3+ 891.13 Unilac ECR 12 C 2+ 161.55 48 Ca 10+ 573 4 He 1+ 72.53 An overall availability of 91% was reached: